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IEEE Standard for Ethernet Amendment 8: Physical Layer Specifications and Management Parameters for 25 Gb/s - Electrical Automotive Ethernet (Approved Draft), 2023
- Front Cover
- Important Notices and Disclaimers Concerning IEEE Standards Documents
- Participants
- Introduction
- Contents
- 1. Introduction [Go to Page]
- 1.4 Definitions
- 30. Management [Go to Page]
- 30.3 Layer management for DTEs [Go to Page]
- 30.3.2 PHY device managed object class [Go to Page]
- 30.3.2.1 PHY device attributes [Go to Page]
- 30.3.2.1.2 aPhyType
- 30.3.2.1.3 aPhyTypeList
- 30.5 Layer management for medium attachment units (MAUs) [Go to Page]
- 30.5.1 MAU managed object class [Go to Page]
- 30.5.1.1 MAU attributes [Go to Page]
- 30.5.1.1.2 aMAUType
- 30.6 Management for link Auto-Negotiation [Go to Page]
- 30.6.1 Auto-Negotiation managed object class [Go to Page]
- 30.6.1.1 Auto-Negotiation attributes [Go to Page]
- 30.6.1.1.5 aAutoNegLocalTechnologyAbility
- 45. Management Data Input/Output (MDIO) Interface [Go to Page]
- 45.2 MDIO Interface registers [Go to Page]
- 45.2.1 PMA/PMD registers [Go to Page]
- 45.2.1.7 PMA/PMD status 2 register (Register 1.8) [Go to Page]
- 45.2.1.7.4 Transmit fault (1.8.11)
- 45.2.1.7.5 Receive fault (1.8.10)
- 45.2.1.16 BASE-T1 PMA/PMD extended ability register (1.18) [Go to Page]
- 45.2.1.16.a 25GBASE-T1 ability (1.18.7)
- 45.2.1.214 BASE-T1 PMA/PMD control register (Register 1.2100) [Go to Page]
- 45.2.1.214.2 Type selection (1.2100.3:0)
- 45.2.1.244 MultiGBASE-T1 training register (1.2311) [Go to Page]
- 45.2.1.244.1 Interleave request (1.2311.12:11)
- 45.2.1.245 MultiGBASE-T1 link partner training register (1.2312) [Go to Page]
- 45.2.1.245.1 Link partner interleave request (1.2312.12:11)
- 45.2.1.246 MultiGBASE-T1 test mode control register (1.2313) [Go to Page]
- 45.2.1.246.1 Test mode control (1.2313.15:13)
- 45.2.1.246.2 Local transmitter precoder override (1.2313.11)
- 45.2.1.246.3 Local transmit precoder setting (1.2313.10:9)
- 45.2.1.246.4 Jitter test control (1.2313.1:0)
- 45.2.3 PCS Registers [Go to Page]
- 45.2.3.87 MultiGBASE-T1 PCS status 2 register (Register 3.2324) [Go to Page]
- 45.2.3.87.2 PCS high RFER (3.2324.9)
- 78. Energy-Efficient Ethernet (EEE) [Go to Page]
- 78.1 Overview [Go to Page]
- 78.1.4 PHY types optionally supporting EEE
- 78.2 LPI mode timing parameters description
- 78.3 Capabilities Negotiation
- 78.5 Communication link access latency
- 98. Auto-Negotiation for single differential-pair media [Go to Page]
- 98.5 Detailed functions and state diagrams [Go to Page]
- 98.5.1 State diagram variables
- 104. Power over Data Lines (PoDL) of Single-Pair Ethernet [Go to Page]
- 104.1 Overview [Go to Page]
- 104.1.3 PoDL system types
- 105. Introduction to 25 Gb/s networks [Go to Page]
- 105.1 Overview [Go to Page]
- 105.1.2 Relationship of 25 Gigabit Ethernet to the ISO OSI reference model
- 105.1.3 Nomenclature
- 105.2 Physical Layer signaling systems
- 105.3 Summary of 25 Gigabit Ethernet sublayers [Go to Page]
- 105.3.2 Physical Coding Sublayer (PCS)
- 105.3.4 Physical Medium Attachment (PMA) sublayer
- 105.3.6 Auto-Negotiation (AN)
- 105.5 Delay constraints
- 105.7 Protocol implementation conformance statement (PICS) proforma
- 149. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 [Go to Page]
- 149.3 Physical Coding Sublayer (PCS) functions [Go to Page]
- 149.3.7 Detailed functions and state diagrams [Go to Page]
- 149.3.7.2 State diagram parameters [Go to Page]
- 149.3.7.2.2 Variables
- 165. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 25GBASE-T1 [Go to Page]
- 165.1 Overview [Go to Page]
- 165.1.1 Nomenclature
- 165.1.2 Relationship of 25GBASE-T1 to other standards
- 165.1.3 Operation of 25GBASE-T1 [Go to Page]
- 165.1.3.1 Physical Coding Sublayer (PCS)
- 165.1.3.2 Physical Medium Attachment (PMA) sublayer
- 165.1.3.3 EEE Capability
- 165.1.3.4 Link Synchronization
- 165.1.4 Signaling
- 165.1.5 Interfaces
- 165.1.6 Conventions in this clause
- 165.2 25GBASE-T1 service primitives and interfaces [Go to Page]
- 165.2.1 Technology Dependent Interface [Go to Page]
- 165.2.1.1 PMA_LINK.request [Go to Page]
- 165.2.1.1.1 Semantics of the primitive
- 165.2.1.1.2 When generated
- 165.2.1.1.3 Effect of receipt
- 165.2.1.2 PMA_LINK.indication [Go to Page]
- 165.2.1.2.1 Semantics of the primitive
- 165.2.1.2.2 When generated
- 165.2.1.2.3 Effect of receipt
- 165.2.2 PMA service interface [Go to Page]
- 165.2.2.1 PMA_TXMODE.indication [Go to Page]
- 165.2.2.1.1 Semantics of the primitive
- 165.2.2.1.2 When generated
- 165.2.2.1.3 Effect of receipt
- 165.2.2.2 PMA_CONFIG.indication [Go to Page]
- 165.2.2.2.1 Semantics of the primitive
- 165.2.2.2.2 When generated
- 165.2.2.2.3 Effect of receipt
- 165.2.2.3 PMA_UNITDATA.request [Go to Page]
- 165.2.2.3.1 Semantics of the primitive
- 165.2.2.3.2 When generated
- 165.2.2.3.3 Effect of receipt
- 165.2.2.4 PMA_UNITDATA.indication [Go to Page]
- 165.2.2.4.1 Semantics of the primitive
- 165.2.2.4.2 When generated
- 165.2.2.4.3 Effect of receipt
- 165.2.2.5 PMA_SCRSTATUS.request [Go to Page]
- 165.2.2.5.1 Semantics of the primitive
- 165.2.2.5.2 When generated
- 165.2.2.5.3 Effect of receipt
- 165.2.2.6 PMA_PCSSTATUS.request [Go to Page]
- 165.2.2.6.1 Semantics of the primitive
- 165.2.2.6.2 When generated
- 165.2.2.6.3 Effect of receipt
- 165.2.2.7 PMA_RXSTATUS.indication [Go to Page]
- 165.2.2.7.1 Semantics of the primitive
- 165.2.2.7.2 When generated
- 165.2.2.7.3 Effect of receipt
- 165.2.2.8 PMA_REMRXSTATUS.request [Go to Page]
- 165.2.2.8.1 Semantics of the primitive
- 165.2.2.8.2 When generated
- 165.2.2.8.3 Effect of receipt
- 165.2.2.9 PMA_PCSDATAMODE.indication [Go to Page]
- 165.2.2.9.1 Semantics of the primitive
- 165.2.2.9.2 When generated
- 165.2.2.9.3 Effect of receipt
- 165.2.2.10 PMA_PCS_RX_LPI_STATUS.request [Go to Page]
- 165.2.2.10.1 Semantics of the primitive
- 165.2.2.10.2 When generated
- 165.2.2.10.3 Effect of receipt
- 165.2.2.11 PMA_PCS_TX_LPI_STATUS.request [Go to Page]
- 165.2.2.11.1 Semantics of the primitive
- 165.2.2.11.2 When generated
- 165.2.2.11.3 Effect of receipt
- 165.2.2.12 PMA_ALERTDETECT.indication [Go to Page]
- 165.2.2.12.1 Semantics of the primitive
- 165.2.2.12.2 When generated
- 165.2.2.12.3 Effect of receipt
- 165.3 Physical Coding Sublayer (PCS) functions [Go to Page]
- 165.3.1 PCS service interface (25GMII)
- 165.3.2 PCS functions [Go to Page]
- 165.3.2.1 PCS Reset function
- 165.3.2.2 PCS Transmit function [Go to Page]
- 165.3.2.2.1 Use of blocks
- 165.3.2.2.2 65B RS-FEC transmission code
- 165.3.2.2.3 Notation conventions
- 165.3.2.2.4 Block structure
- 165.3.2.2.5 Control codes
- 165.3.2.2.6 Ordered sets
- 165.3.2.2.7 Idle (/I/)
- 165.3.2.2.8 LPI (/LI/)
- 165.3.2.2.9 Start (/S/)
- 165.3.2.2.10 Terminate (/T/)
- 165.3.2.2.11 Ordered set (/O/)
- 165.3.2.2.12 Error (/E/)
- 165.3.2.2.13 Transmit process
- 165.3.2.2.14 RS-FEC framing and RS-FEC encoder
- 165.3.2.2.15 RS-FEC superframe and round-robin interleaving
- 165.3.2.2.16 RS-FEC recombine
- 165.3.2.2.17 Reed-Solomon encoder
- 165.3.2.2.18 PCS scrambler
- 165.3.2.2.19 Gray mapping for PAM4 encoding
- 165.3.2.2.20 Selectable precoder
- 165.3.2.2.21 PAM4 encoding
- 165.3.2.2.22 EEE capability
- 165.3.2.3 PCS Receive function [Go to Page]
- 165.3.2.3.1 Frame and block synchronization
- 165.3.2.3.2 PCS descrambler
- 165.3.2.3.3 Invalid blocks
- 165.3.3 Test-pattern generators
- 165.3.4 Side-stream scrambler polynomials
- 165.3.5 PMA training frame [Go to Page]
- 165.3.5.1 Generation of symbol Tn
- 165.3.5.2 PMA training mode descrambler polynomials
- 165.3.6 LPI signaling [Go to Page]
- 165.3.6.1 LPI synchronization
- 165.3.6.2 Quiet period signaling
- 165.3.6.3 Refresh period signaling
- 165.3.7 Detailed functions and state diagrams [Go to Page]
- 165.3.7.1 State diagram conventions
- 165.3.7.2 State diagram parameters [Go to Page]
- 165.3.7.2.1 Constants
- 165.3.7.2.2 Variables
- 165.3.7.2.3 Timers
- 165.3.7.2.4 Functions
- 165.3.7.2.5 Counters
- 165.3.7.2.6 Messages
- 165.3.7.3 State diagrams
- 165.3.8 PCS management
- 165.3.9 25GBASE-T1 operations, administration, and maintenance (OAM) [Go to Page]
- 165.3.9.1 Definitions
- 165.3.9.2 Functional specifications [Go to Page]
- 165.3.9.2.1 25GBASE-T1 OAM frame structure
- 165.3.9.3 State diagram variable to OAM register mapping
- 165.3.9.4 Detailed functions and state diagrams [Go to Page]
- 165.3.9.4.1 State diagram conventions
- 165.3.9.4.2 State diagram parameters
- 165.3.9.4.3 Variables
- 165.3.9.4.4 Counters
- 165.3.9.4.5 Functions
- 165.3.9.4.6 State diagrams
- 165.4 Physical Medium Attachment (PMA) sublayer [Go to Page]
- 165.4.1 PMA functional specifications
- 165.4.2 PMA functions [Go to Page]
- 165.4.2.1 PMA Reset function
- 165.4.2.2 PMA Transmit function [Go to Page]
- 165.4.2.2.1 Global PMA transmit disable
- 165.4.2.3 PMA Receive function
- 165.4.2.4 PHY Control function [Go to Page]
- 165.4.2.4.1 Infofield notation
- 165.4.2.4.2 Start of frame delimiter
- 165.4.2.4.3 Partial frame count (PFC24)
- 165.4.2.4.4 Message Field
- 165.4.2.4.5 PHY capability bits
- 165.4.2.4.6 Data switch partial frame count
- 165.4.2.4.7 Reserved fields
- 165.4.2.4.8 CRC16
- 165.4.2.4.9 PMA MDIO function mapping
- 165.4.2.4.10 Startup sequence
- 165.4.2.5 Link Monitor function
- 165.4.2.6 PHY Link Synchronization [Go to Page]
- 165.4.2.6.1 State diagram variables
- 165.4.2.6.2 State diagram timers
- 165.4.2.6.3 Messages
- 165.4.2.6.4 State diagrams
- 165.4.2.7 Refresh monitor function
- 165.4.2.8 Clock Recovery function
- 165.4.3 MDI [Go to Page]
- 165.4.3.1 MDI signals transmitted by the PHY
- 165.4.3.2 Signals received at the MDI
- 165.4.4 State variables [Go to Page]
- 165.4.4.1 State diagram variables
- 165.4.4.2 Timers
- 165.4.5 State diagrams
- 165.5 PMA electrical specifications [Go to Page]
- 165.5.1 Test modes [Go to Page]
- 165.5.1.1 Test configurations
- 165.5.2 Test Points
- 165.5.3 Transmitter electrical specifications [Go to Page]
- 165.5.3.1 Maximum output droop
- 165.5.3.2 Transmitter linearity
- 165.5.3.3 Transmitter timing jitter [Go to Page]
- 165.5.3.3.1 Transmit MDI random jitter in MASTER mode
- 165.5.3.3.2 Transmit MDI deterministic jitter in MASTER mode
- 165.5.3.4 Transmitter power spectral density (PSD) and power level
- 165.5.3.5 Transmitter peak differential output
- 165.5.3.6 Transmitter clock frequency
- 165.5.4 Receiver electrical specifications [Go to Page]
- 165.5.4.1 Receiver differential input signals
- 165.5.4.2 Alien crosstalk noise rejection
- 165.5.5 Test configurations [Go to Page]
- 165.5.5.1 Host test configuration
- 165.5.5.2 Link segment test configuration
- 165.5.5.3 Mated test configurations [Go to Page]
- 165.5.5.3.1 Insertion loss
- 165.5.5.3.2 Return loss
- 165.5.5.3.3 Mode Conversion
- 165.5.5.3.4 Crosstalk
- 165.6 Management interface [Go to Page]
- 165.6.1 Optional support for Auto-Negotiation
- 165.7 Link segment characteristics [Go to Page]
- 165.7.1 Link transmission parameters [Go to Page]
- 165.7.1.1 Insertion loss
- 165.7.1.2 Differential characteristic impedance
- 165.7.1.3 Return loss [Go to Page]
- 165.7.1.3.1 25GBASE-T1 link segment return loss
- 165.7.1.3.2 Characteristics of the echo from the link segment
- 165.7.1.3.3 Residual echo metric (REM)
- 165.7.1.3.4 Calculating residual echo metric
- 165.7.1.3.5 Limit on residual echo metric
- 165.7.1.3.6 Echo tail metric (ETM)
- 165.7.1.3.7 Calculating echo tail metric
- 165.7.1.3.8 Limit on echo tail metric
- 165.7.1.4 Coupling attenuation
- 165.7.1.5 Screening attenuation
- 165.7.1.6 Maximum link delay
- 165.7.2 Coupling parameters between link segments [Go to Page]
- 165.7.2.1 Power sum alien near-end crosstalk (PSANEXT)
- 165.7.2.2 Power sum alien attenuation to crosstalk ratio far-end (PSAACRF)
- 165.8 MDI specification [Go to Page]
- 165.8.1 MDI connectors
- 165.8.2 MDI electrical specification [Go to Page]
- 165.8.2.1 MDI return loss
- 165.8.3 MDI fault tolerance
- 165.9 Environmental specifications [Go to Page]
- 165.9.1 General safety
- 165.9.2 Network safety [Go to Page]
- 165.9.2.1 Environmental safety
- 165.9.2.2 Electromagnetic compatibility
- 165.10 Delay constraints
- 165.11 Protocol implementation conformance statement (PICS) proforma for Clause 165, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 25GBASE-T1 [Go to Page]
- 165.11.1 Introduction
- 165.11.2 Identification [Go to Page]
- 165.11.2.1 Implementation identification
- 165.11.2.2 Protocol summary
- 165.11.3 Major capabilities/options
- 165.11.4 PICS proforma tables for Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 25GBASE-T1 [Go to Page]
- 165.11.4.1 General
- 165.11.4.2 Physical Coding Sublayer (PCS) [Go to Page]
- 165.11.4.2.1 PCS Transmit
- 165.11.4.2.2 PCS Receive
- 165.11.4.2.3 Test-pattern generators
- 165.11.4.2.4 Side-stream scrambler
- 165.11.4.2.5 LPI signaling
- 165.11.4.2.6 Functions and state diagrams
- 165.11.4.2.7 PCS loopback
- 165.11.4.2.8 OAM
- 165.11.4.3 Physical Medium Attachment (PMA) [Go to Page]
- 165.11.4.3.1 PMA Reset function
- 165.11.4.3.2 PMA Transmit function
- 165.11.4.3.3 PMA Receive function
- 165.11.4.3.4 PHY Control function
- 165.11.4.3.5 Link Monitor function
- 165.11.4.3.6 PHY Link Synchronization
- 165.11.4.3.7 Refresh monitor function
- 165.11.4.3.8 Clock Recovery function
- 165.11.4.3.9 MDI
- 165.11.4.3.10 PMA State variables
- 165.11.4.4 PMA electrical specifications [Go to Page]
- 165.11.4.4.1 Test modes
- 165.11.4.4.2 Transmitter electrical specifications
- 165.11.4.4.3 Receiver electrical specifications
- 165.11.4.4.4 Mated test configurations
- 165.11.4.5 Link segment characteristics
- 165.11.4.6 MDI specifications
- 165.11.4.7 Delay constraints
- Annex 98B (normative) IEEE 802.3 Selector Base Page definition [Go to Page]
- 98B.3 Technology Ability Field bit assignments
- 98B.4 Priority Resolution
- Annex 149B (informative) OAM status [Go to Page]
- 149B.1 Purpose
- Annex 165A (informative) Tx function to Rx function channel characteristics [Go to Page]
- 165A.1 Overview
- 165A.2 TP2 to TP0 and TP3 to TP5 reference insertion loss [Go to Page]
- 165A.2.1 Host PCB trace loss
- 165A.3 TP0 to TP5 channel insertion loss
- 165A.4 Example models for Tx/Rx function to MDI return loss
- 165A.5 Coupling between ports on multiport designs
- Back Cover [Go to Page]
