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IEEE Standard for Ethernet Amendment 7: Media Access Control Parameters, Physical Layers, and Management Parameters for 2.5 Gb/s and 5 Gb/s Operation, Types 2.5GBASE-T and 5GBASE-T, 2016
- IEEE Std 802.3bz-2016 Front Cover
- Title page
- Important Notices and Disclaimers Concerning IEEE Standards Documents
- Participants
- Introduction
- Contents
- Important Notice
- 1. Introduction [Go to Page]
- 1.1 Overview [Go to Page]
- 1.1.3 Architectural perspectives [Go to Page]
- 1.1.3.2 Compatibility interfaces
- 1.3 Normative references
- 1.4 Definitions
- 1.5 Abbreviations
- 4. Media Access Control [Go to Page]
- 4.4 Specific implementations [Go to Page]
- 4.4.2 MAC parameters
- 28. Physical Layer link signaling for Auto-Negotiation on twisted pair [Go to Page]
- 28.3 State diagrams and variable definitions [Go to Page]
- 28.3.1 State diagram variables
- 30. Management [Go to Page]
- 30.3 Layer management for DTEs [Go to Page]
- 30.3.2 PHY device managed object class [Go to Page]
- 30.3.2.1 PHY device attributes [Go to Page]
- 30.3.2.1.2 aPhyType
- 30.3.2.1.3 aPhyTypeList
- 30.5 Layer management for medium attachment units (MAUs) [Go to Page]
- 30.5.1 MAU managed object class [Go to Page]
- 30.5.1.1 MAU attributes [Go to Page]
- 30.5.1.1.2 aMAUType
- 30.5.1.1.4 aMediaAvailable
- 30.5.1.1.24 aLDFastRetrainCount
- 30.5.1.1.25 aLPFastRetrainCount
- 30.6 Management for link Auto-Negotiation [Go to Page]
- 30.6.1 Auto-Negotiation managed object class [Go to Page]
- 30.6.1.1 Auto-Negotiation attributes [Go to Page]
- 30.6.1.1.5 aAutoNegLocalTechnologyAbility
- 45. Management Data Input/Output (MDIO) Interface [Go to Page]
- 45.1 Overview
- 45.2 MDIO Interface Registers [Go to Page]
- 45.2.1 PMA/PMD registers [Go to Page]
- 45.2.1.1 PMA/PMD control 1 register (Register 1.0) [Go to Page]
- 45.2.1.1.3 Speed selection (1.0.13, 1.0.6, 1.0.5:2)
- 45.2.1.4 PMA/PMD speed ability (Register 1.4) [Go to Page]
- 45.2.1.4.aa 5G capable (1.4.14)
- 45.2.1.4.ab 2.5G capable (1.4.13)
- 45.2.1.6 PMA/PMD control 2 register (Register 1.7)
- 45.2.1.7 PMA/PMD status 2 register (Register 1.8) [Go to Page]
- 45.2.1.7.4 Transmit fault (1.8.11)
- 45.2.1.7.5 Receive fault (1.8.10)
- 45.2.1.8 PMD transmit disable register (Register 1.9)
- 45.2.1.10 PMA/PMD extended ability register (Register 1.11) [Go to Page]
- 45.2.1.10.aaa 2.5G/5G extended abilities (1.11.14)
- 45.2.1.14c 2.5G/5G PMA/PMD extended ability register (Register 1.21) [Go to Page]
- 45.2.1.14c.1 5GBASE-T ability (1.21.1)
- 45.2.1.14c.2 2.5GBASE-T ability (1.21.0)
- 45.2.1.62 MultiGBASE-T status (Register 1.129) [Go to Page]
- 45.2.1.62.1 LP information valid (1.129.0)
- 45.2.1.64 MultiGBASE-T TX power backoff and PHY short reach setting (Register 1.131) [Go to Page]
- 45.2.1.64.1 MultiGBASE-T TX power backoff settings (1.131.15:10)
- 45.2.1.65 MultiGBASE-T test mode register (Register 1.132) [Go to Page]
- 45.2.1.65.1 Test mode control (1.132.15:13)
- 45.2.1.65.2 Transmitter test frequencies (1.132.12:10)
- 45.2.1.74 RX signal power channel A register (Register 1.141)
- 45.2.1.75 RX signal power channel B register (Register 1.142)
- 45.2.1.76 RX signal power channel C register (Register 1.143)
- 45.2.1.77 RX signal power channel D register (Register 1.144)
- 45.2.1.78 MultiGBASE-T skew delay register (Registers 1.145 and 1.146)
- 45.2.1.79 MultiGBASE-T fast retrain status and control register (Register 1.147) [Go to Page]
- 45.2.1.79.1 LP fast retrain count (1.147.15:11)
- 45.2.1.79.2 LD fast retrain count (1.147.10:6)
- 45.2.1.79.5 Fast retrain signal type (1.147.2:1)
- 45.2.1.79.6 Fast retrain enable (1.147.0)
- 45.2.3 PCS registers [Go to Page]
- 45.2.3.1 PCS control 1 register (Register 3.0) [Go to Page]
- 45.2.3.1.2 Loopback (3.0.14)
- 45.2.3.4 PCS speed ability register (Register 3.4) [Go to Page]
- 45.2.3.4.6 2.5G capable (3.4.6)
- 45.2.3.4.7 5G Capable (3.4.7)
- 45.2.3.6 PCS control 2 register (Register 3.7)
- 45.2.3.7 PCS status 2 register (Register 3.8) [Go to Page]
- 45.2.3.7.1a 5GBASE-T capable (3.8.13)
- 45.2.3.7.1b 2.5GBASE-T capable (3.8.12)
- 45.2.3.9a EEE control and capability 2 register (Register 3.21) [Go to Page]
- 45.2.3.9a.2 5GBASE-T EEE supported (3.21.1)
- 45.2.3.9a.3 2.5GBASE-T EEE supported (3.21.0)
- 45.2.3.13 BASE-R and MultiGBASE-T PCS status 1 register (Register 3.32) [Go to Page]
- 45.2.3.13.1 BASE-R and MultiGBASE-T receive link status (3.32.12)
- 45.2.3.13.4 BASE-R and MultiGBASE-T PCS high BER (3.32.1)
- 45.2.3.13.5 BASE-R and MultiGBASE-T block lock (3.32.0)
- 45.2.3.14 BASE-R and MultiGBASE-T PCS status 2 register (Register 3.33) [Go to Page]
- 45.2.3.14.3 BER (3.33.13:8)
- 45.2.3.14.4 Errored blocks (3.33.7:0)
- 45.2.7 Auto-Negotiation registers [Go to Page]
- 45.2.7.10 MultiGBASE-T AN control 1 register (Register 7.32) [Go to Page]
- 45.2.7.10.4ca 5GBASE-T capability (7.32.8)
- 45.2.7.10.4cb 2.5GBASE-T capability (7.32.7)
- 45.2.7.10.4cc 5GBASE-T Fast retrain ability (7.32.6)
- 45.2.7.10.4cd 2.5GBASE-T Fast retrain ability (7.32.5)
- 45.2.7.11 MultiGBASE-T AN status 1 register (Register 7.33) [Go to Page]
- 45.2.7.11.1 MASTER-SLAVE configuration fault (7.33.15)
- 45.2.7.11.2 MASTER-SLAVE configuration resolution (7.33.14)
- 45.2.7.11.7ba Link partner 5GBASE-T capability (7.33.6)
- 45.2.7.11.7bb Link partner 2.5GBASE-T capability (7.33.5)
- 45.2.7.11.7bc 5GBASE-T Fast retrain ability (7.33.4)
- 45.2.7.11.7bd 2.5GBASE-T Fast retrain ability (7.33.3)
- 45.2.7.13 EEE advertisement 1 (Register 7.60)
- 45.2.7.14 EEE link partner ability 1 (Register 7.61)
- 45.2.7.14aa EEE advertisement 2 (Register 7.62) [Go to Page]
- 45.2.7.14aa.1 5GBASE-T EEE (7.62.1)
- 45.2.7.14aa.2 2.5GBASE-T EEE (7.62.0)
- 45.2.7.14ab EEE link partner ability 2 (Register 7.63)
- 45.2.7.14a MultiGBASE-T AN control 2 (Register 7.64) [Go to Page]
- 45.2.7.14a.a 2.5GBASE-T THP Bypass Request
- 45.2.7.14a.b 5GBASE-T THP Bypass Request
- 45.2.7.14b MultiGBASE-T AN status 2 (Register 7.65) [Go to Page]
- 45.2.7.14b.a 2.5GBASE-T Link Partner THP Bypass Request
- 45.2.7.14b.b 5GBASE-T Link Partner THP Bypass Request
- 45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, Management Data Input/Output (MDIO) interface [Go to Page]
- 45.5.3 PICS proforma tables for the Management Data Input Output (MDIO) interface [Go to Page]
- 45.5.3.2 PMA/PMD MMD options
- 45.5.3.3 PMA/PMD management functions
- 45.5.3.9 Auto-Negotiation management functions
- 46. Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface (XGMII) [Go to Page]
- 46.1 Overview [Go to Page]
- 46.1.1 Summary of major concepts
- 46.1.2 Application
- 46.1.3 Rate of operation [Go to Page]
- 46.3.1.1 TX_CLK (10 Gb/s transmit clock)
- 46.3.2.1 RX_CLK (receive clock)
- 46.5 XGMII electrical characteristics
- 46.6 Protocol implementation conformance statement (PICS) proforma for Clause 46, Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface (XGMII) [Go to Page]
- 46.6.3 PICS proforma Tables for Reconciliation Sublayer and 10 Gigabit Media Independent Interface [Go to Page]
- 46.6.3.1 General
- 46.6.3.6 XGMII signal functional specifications
- 78. Energy-Efficient Ethernet (EEE) [Go to Page]
- 78.1 Overview [Go to Page]
- 78.1.4 PHY types optionally supporting EEE
- 78.2 LPI mode timing parameters description
- 78.3 Capabilities Negotiation
- 78.5 Communication link access latency
- 125. Introduction to 2.5 Gb/s and 5 Gb/s networks [Go to Page]
- 125.1 Overview [Go to Page]
- 125.1.1 Scope
- 125.1.2 Relationship of 2.5 Gigabit and 5 Gigabit Ethernet to the ISO OSI reference model
- 125.1.3 Nomenclature
- 125.1.4 Physical Layer signaling systems
- 125.2 Summary of 2.5 Gigabit and 5 Gigabit Ethernet sublayers [Go to Page]
- 125.2.1 Reconciliation Sublayer (RS) and Media Independent Interface
- 125.2.2 Physical Coding Sublayer (PCS)
- 125.2.3 Physical Medium Attachment sublayer (PMA)
- 125.2.4 Auto-Negotiation, type BASE-T
- 125.2.5 Management interface (MDIO/MDC)
- 125.2.6 Management
- 125.3 Delay Constraints
- 126. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 2.5GBASE-T and 5GBASE-T [Go to Page]
- 126.1 Overview [Go to Page]
- 126.1.1 Nomenclature
- 126.1.2 Relationship of 2.5GBASE-T and 5GBASE-T to other standards
- 126.1.3 Operation of 2.5GBASE-T and 5GBASE-T [Go to Page]
- 126.1.3.1 Summary of Physical Coding Sublayer (PCS)
- 126.1.3.2 Summary of Physical Medium Attachment (PMA) sublayer
- 126.1.3.3 Summary of EEE capability
- 126.1.4 Signaling
- 126.1.5 Interfaces
- 126.1.6 Conventions in this clause
- 126.2 2.5GBASE-T and 5GBASE-T service primitives and interfaces [Go to Page]
- 126.2.1 Technology Dependent Interface [Go to Page]
- 126.2.1.1 PMA_LINK.request [Go to Page]
- 126.2.1.1.1 Semantics of the primitive
- 126.2.1.1.2 When generated
- 126.2.1.1.3 Effect of receipt
- 126.2.1.2 PMA_LINK.indication [Go to Page]
- 126.2.1.2.1 Semantics of the primitive
- 126.2.1.2.2 When generated
- 126.2.1.2.3 Effect of receipt
- 126.2.2 PMA service interface [Go to Page]
- 126.2.2.1 PMA_TXMODE.indication [Go to Page]
- 126.2.2.1.1 Semantics of the primitive
- 126.2.2.1.2 When generated
- 126.2.2.1.3 Effect of receipt
- 126.2.2.2 PMA_CONFIG.indication [Go to Page]
- 126.2.2.2.1 Semantics of the primitive
- 126.2.2.2.2 When generated
- 126.2.2.2.3 Effect of receipt
- 126.2.2.3 PMA_UNITDATA.request [Go to Page]
- 126.2.2.3.1 Semantics of the primitive
- 126.2.2.3.2 When generated
- 126.2.2.3.3 Effect of receipt
- 126.2.2.4 PMA_UNITDATA.indication [Go to Page]
- 126.2.2.4.1 Semantics of the primitive
- 126.2.2.4.2 When generated
- 126.2.2.4.3 Effect of receipt
- 126.2.2.5 PMA_SCRSTATUS.request [Go to Page]
- 126.2.2.5.1 Semantics of the primitive
- 126.2.2.5.2 When generated
- 126.2.2.5.3 Effect of receipt
- 126.2.2.6 PMA_PCSSTATUS.request [Go to Page]
- 126.2.2.6.1 Semantics of the primitive
- 126.2.2.6.2 When generated
- 126.2.2.6.3 Effect of receipt
- 126.2.2.7 PMA_RXSTATUS.indication [Go to Page]
- 126.2.2.7.1 Semantics of the primitive
- 126.2.2.7.2 When generated
- 126.2.2.7.3 Effect of receipt
- 126.2.2.8 PMA_REMRXSTATUS.request [Go to Page]
- 126.2.2.8.1 Semantics of the primitive
- 126.2.2.8.2 When generated
- 126.2.2.8.3 Effect of receipt
- 126.2.2.9 PMA_ALERTDETECT.indication [Go to Page]
- 126.2.2.9.1 Semantics of the primitive
- 126.2.2.9.2 When generated
- 126.2.2.9.3 Effect of receipt
- 126.2.2.10 PCS_RX_LPI_STATUS.request [Go to Page]
- 126.2.2.10.1 Semantics of the primitive
- 126.2.2.10.2 When generated
- 126.2.2.10.3 Effect of receipt
- 126.2.2.11 PMA_PCSDATAMODE.indication [Go to Page]
- 126.2.2.11.1 Semantics of the primitive
- 126.2.2.11.2 When generated
- 126.2.2.11.3 Effect of receipt
- 126.2.2.12 PMA_FR_ACTIVE.indication [Go to Page]
- 126.2.2.12.1 Semantics of the primitive
- 126.2.2.12.2 When generated
- 126.2.2.12.3 Effect of receipt
- 126.3 Physical Coding Sublayer (PCS) [Go to Page]
- 126.3.1 PCS service interface (XGMII)
- 126.3.2 PCS functions [Go to Page]
- 126.3.2.1 PCS Reset function
- 126.3.2.2 PCS Transmit function [Go to Page]
- 126.3.2.2.1 Use of blocks
- 126.3.2.2.2 65B-LDPC transmission code
- 126.3.2.2.3 Notation conventions
- 126.3.2.2.4 Transmission order
- 126.3.2.2.5 Block structure
- 126.3.2.2.6 Control codes
- 126.3.2.2.7 Ordered sets
- 126.3.2.2.8 Idle (/I/)
- 126.3.2.2.9 LPI (/LI/)
- 126.3.2.2.10 Start (/S/)
- 126.3.2.2.11 Terminate (/T/)
- 126.3.2.2.12 ordered set (/O/)
- 126.3.2.2.13 Error (/E/)
- 126.3.2.2.14 Transmit process
- 126.3.2.2.15 PCS Scrambler
- 126.3.2.2.16 LDPC framing and LDPC encoder
- 126.3.2.2.17 Substitution for zero-bit fill
- 126.3.2.2.18 PAM16 bit mapping
- 126.3.2.2.19 EEE capability
- 126.3.2.3 PCS Receive function [Go to Page]
- 126.3.2.3.1 Frame and block synchronization
- 126.3.2.3.2 PCS descrambler
- 126.3.2.3.3 Invalid blocks
- 126.3.3 Test-pattern generators
- 126.3.4 PMA training side-stream scrambler polynomials [Go to Page]
- 126.3.4.1 Generation of bits San, Sbn, Scn, Sdn
- 126.3.4.2 Generation of 4D symbols TAn, TBn, TCn, TDn
- 126.3.4.3 PMA training mode descrambler polynomials
- 126.3.5 LPI signaling [Go to Page]
- 126.3.5.1 LPI Synchronization
- 126.3.5.2 Quiet period signaling
- 126.3.5.3 Refresh period signaling
- 126.3.6 Detailed functions and state diagrams [Go to Page]
- 126.3.6.1 State diagram conventions
- 126.3.6.2 State diagram parameters [Go to Page]
- 126.3.6.2.1 Constants
- 126.3.6.2.2 Variables
- 126.3.6.2.3 Timers
- 126.3.6.2.4 Functions
- 126.3.6.2.5 Counters
- 126.3.6.3 State diagrams
- 126.3.7 PCS management [Go to Page]
- 126.3.7.1 Status
- 126.3.7.2 Counters
- 126.3.7.3 Loopback
- 126.4 Physical Medium Attachment (PMA) sublayer [Go to Page]
- 126.4.1 PMA functional specifications
- 126.4.2 PMA functions [Go to Page]
- 126.4.2.1 PMA Reset function
- 126.4.2.2 PMA Transmit function [Go to Page]
- 126.4.2.2.1 Alert signal
- 126.4.2.2.2 Link failure signal
- 126.4.2.3 PMA transmit disable function [Go to Page]
- 126.4.2.3.1 Global PMA transmit disable function
- 126.4.2.3.2 PMA pair by pair transmit disable function
- 126.4.2.3.3 PMA MDIO function mapping
- 126.4.2.4 PMA Receive function
- 126.4.2.5 PHY Control function [Go to Page]
- 126.4.2.5.1 Infofield notation
- 126.4.2.5.2 Start of Frame Delimiter
- 126.4.2.5.3 Current transmitter settings
- 126.4.2.5.4 Next transmitter settings
- 126.4.2.5.5 Requested transmitter settings
- 126.4.2.5.6 Message field
- 126.4.2.5.7 SNR_margin
- 126.4.2.5.8 Transition counter
- 126.4.2.5.9 Coefficient exchange handshake
- 126.4.2.5.10 Ability fields
- 126.4.2.5.11 Reserved fields
- 126.4.2.5.12 Vendor-specific field
- 126.4.2.5.13 Coefficient field
- 126.4.2.5.14 CRC16
- 126.4.2.5.15 Startup sequence
- 126.4.2.5.16 Fast retrain function
- 126.4.2.6 Link Monitor function
- 126.4.2.7 Refresh Monitor function
- 126.4.2.8 Clock Recovery function
- 126.4.3 MDI [Go to Page]
- 126.4.3.1 MDI signals transmitted by the PHY
- 126.4.3.2 Signals received at the MDI
- 126.4.4 Automatic MDI/MDI-X configuration
- 126.4.5 State variables [Go to Page]
- 126.4.5.1 State diagram variables
- 126.4.5.2 Timers
- 126.4.5.3 Functions
- 126.4.5.4 Counters
- 126.4.6 State diagrams [Go to Page]
- 126.4.6.1 PHY Control state diagram
- 126.4.6.2 Transition counter state diagrams
- 126.4.6.3 Link Monitor state diagram
- 126.4.6.4 EEE Refresh monitor state diagram
- 126.4.6.5 Fast retrain state diagram
- 126.5 PMA electrical specifications [Go to Page]
- 126.5.1 Isolation requirement
- 126.5.2 Test modes [Go to Page]
- 126.5.2.1 Test fixtures
- 126.5.3 Transmitter electrical specifications [Go to Page]
- 126.5.3.1 Maximum output droop
- 126.5.3.2 Transmitter nonlinear distortion
- 126.5.3.3 Transmitter timing jitter
- 126.5.3.4 Transmitter power spectral density (PSD) and power level
- 126.5.3.5 Transmit clock frequency
- 126.5.4 Receiver electrical specifications [Go to Page]
- 126.5.4.1 Receiver differential input signals
- 126.5.4.2 Receiver frequency tolerance
- 126.5.4.3 Rejection of External EM Fields
- 126.5.4.4 Alien crosstalk noise rejection
- 126.6 Management interfaces [Go to Page]
- 126.6.1 Support for Auto-Negotiation [Go to Page]
- 126.6.1.1 2.5GBASE-T and 5GBASE-T use of registers during Auto-Negotiation
- 126.6.1.2 2.5GBASE-T and 5GBASE-T Auto-Negotiation page use
- 126.6.1.3 Sending Next Pages
- 126.6.2 MASTER-SLAVE configuration resolution
- 126.7 Link segment characteristics [Go to Page]
- 126.7.1 Cabling system characteristics
- 126.7.2 Link segment transmission parameters [Go to Page]
- 126.7.2.1 Insertion loss
- 126.7.2.2 Differential characteristic impedance
- 126.7.2.3 Return loss
- 126.7.2.4 Coupling parameters between duplex channels comprising one link segment [Go to Page]
- 126.7.2.4.1 Differential near-end crosstalk
- 126.7.2.4.2 Multiple disturber near-end crosstalk (MDNEXT) loss
- 126.7.2.4.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss
- 126.7.2.4.4 Attenuation to crosstalk ratio, far-end (ACRF)
- 126.7.2.4.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF)
- 126.7.2.4.6 Multiple disturber power sum attenuation to crosstalk ratio, far-end (PS ACRF)
- 126.7.2.5 Maximum link delay
- 126.7.2.6 Link delay skew
- 126.7.3 Coupling parameters between link segments [Go to Page]
- 126.7.3.1 Alien crosstalk limited signal-to-noise ratio criteria
- 126.8 MDI specification [Go to Page]
- 126.8.1 MDI connectors
- 126.8.2 MDI electrical specifications [Go to Page]
- 126.8.2.1 MDI FEXT
- 126.8.2.2 MDI return loss
- 126.8.2.3 MDI impedance balance
- 126.8.2.4 MDI fault tolerance
- 126.9 Environmental specifications [Go to Page]
- 126.9.1 General safety
- 126.9.2 Network safety
- 126.9.3 Installation and maintenance guidelines
- 126.9.4 Telephone voltages
- 126.9.5 Electromagnetic compatibility
- 126.9.6 Temperature and humidity
- 126.10 PHY labeling
- 126.11 Delay constraints
- 126.12 Protocol implementation conformance statement (PICS) proforma for Clause 126—Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 2.5GBASE-T and 5GBASE-T [Go to Page]
- 126.12.1 Identification [Go to Page]
- 126.12.1.1 Implementation identification
- 126.12.1.2 Protocol summary
- 126.12.2 Major capabilities/options
- 126.12.3 Physical Coding Sublayer (PCS) [Go to Page]
- 126.12.3.1 PCS Transmit functions
- 126.12.3.2 PCS Receive functions
- 126.12.3.3 Other PCS functions
- 126.12.4 Physical Medium Attachment (PMA)
- 126.12.5 PMA Electrical Specifications
- 126.12.6 PMA Management Interface
- 126.12.7 Characteristics of the link segment
- 126.12.8 MDI requirements
- 126.12.9 General safety and environmental requirements
- 126.12.10 Timing requirements
- Annex 28B
- IEEE 802.3 Selector Base Page definition
- 28B.3 Priority resolution
- Annex 28C
- Next Page Message Code field definitions
- 28C.11 Message code 9—MultiGBASE-T and 1000BASE-T technology message code
- Annex 28D
- Description of extensions to Clause 28 and associated annexes
- 28D.9 Extensions required for Clause 126 (2.5G/5GBASE-T)
- Annex 31B
- MAC Control PAUSE operation
- 31B.3 Detailed specification of PAUSE operation [Go to Page]
- 31B.3.7 Timing considerations for PAUSE operation
- 31B.4 Protocol implementation conformance statement (PICS) proforma for MAC Control PAUSE operation [Go to Page]
- 31B.4.3 Major capabilities/options
- 31B.4.6 PAUSE command MAC timing considerations
- Back Cover [Go to Page]
